数字逻辑与EDA技术课程设计---闹钟

简介: 本次数字逻辑与EDA技术实验课程设计用FPGA实现了一个总时长为一小时的闹钟,它所具有的功能如下:基本功能:(1)正常时间显示,按照正常的时钟进行计时;(2)闹钟时间显示,显示出来设置的闹钟时间;(3)闹钟触发,时钟走到闹钟时间后触发闹钟。设计功能:(1)手动调整时间,如果某时刻的时钟时间与正常时间有偏差,可以进行手动调整,使之与正常时间一致;(2)八路彩灯,时钟走到闹钟时间后,会进行8秒的彩灯闪烁,彩灯依次从全亮到逐渐向中间熄灭,再到向两边闪烁直到全亮,提醒使用者设置的闹钟到点了。

一、功能介绍

本次数字逻辑与EDA技术实验课程设计用FPGA实现了一个总时长为一小时的闹钟,它所具有的功能如下:
基本功能:
(1)正常时间显示,按照正常的时钟进行计时;
(2)闹钟时间显示,显示出来设置的闹钟时间;
(3)闹钟触发,时钟走到闹钟时间后触发闹钟。
设计功能:
(1)手动调整时间,如果某时刻的时钟时间与正常时间有偏差,可以进行手动调整,使之与正常时间一致;
(2)八路彩灯,时钟走到闹钟时间后,会进行8秒的彩灯闪烁,彩灯依次从全亮到逐渐向中间熄灭,再到向两边闪烁直到全亮,提醒使用者设置的闹钟到点了。

二、设计思路

(1)对本次设计所需要的彩灯以及显示器还有开关进行一个汇总,并提前查阅其各自的管脚,进行分配;
(2)用实验三分频的方法设计出来一个1s的时钟,用于后面的时钟时间显示以及状态转移的持续时间;
(3)分别设计出来时钟自动计时以及手动调节时间的分秒进位,以及目前时钟显示的时间与设置闹钟的时间是否一致;
(4)设计分秒的显示;
(5)用实验四有限状态机的设计方法进行8路彩灯的显示。

三、模块结构

(1)模块一:设计得到1s的时钟信号;
(2)模块二:手动设置与自动计时的控制;
(3)模块三:设置闹钟与闹钟触发;
(4)模块四:手动调整时间;
(5)模块五:分秒显示;
(6)模块六:闹钟触发的8路彩灯显示。

四、代码

module ljw_clock(clk50,clear,set_mod,set_clock,set_option,add_time,led,out1,out2);
(*chip_pin="Y2"*)input clk50;
(*chip_pin="AB28"*)input clear;
(*chip_pin="AC27"*)input set_mod;
(*chip_pin="AC28"*)input set_clock;
(*chip_pin="M23"*)input set_option;
(*chip_pin="M21"*)input add_time;
(*chip_pin="G19,F19,E19,F21,F18,E18,J19,H19"*)output reg[7:0] led;
(*chip_pin="V21,U21,AB20,AA21,AD24,AF23,Y19,AA25,AA26,Y25,W26,Y26,W27,W28"*)output reg[13:0] out1;
(*chip_pin="M24,Y22,W21,W22,W25,U23,U24,G18,F22,E17,L26,L25,J22,H22"*)output reg[13:0] out2;
             
reg[5:0] sec;
reg[5:0] min;

//the first module
reg clk1;
reg[24:0] cout;
always@(posedge clk50)
begin
    if(cout==25'd24999999)
    begin
        cout = 0;
        clk1 = ~clk1;
    end
    else
        cout = cout + 1;
end

//the second module
reg[5:0] sec_1;
reg[5:0] min_1;
reg[5:0] sec_2;
reg[5:0] min_2;

reg flag;
reg[3:0] CS;
reg[3:0] NS;

always@(posedge clk1)
begin
    // 2-1
    if(flag==1 && sec-10<clock_sec)
    begin
        CS = NS;
        NS = sec - clock_sec;
        case(NS)
            4'd0:NS = s1;
            4'd1:NS = s2;
            4'd2:NS = s3;
            4'd3:NS = s4;
            4'd4:NS = s5;
            4'd5:NS = s6;
            4'd6:NS = s7;
            4'd7:NS = s8;
            4'd8:NS = s9;
            4'd9:NS = s0;
            default:NS = s0;
        endcase
    end
    // 2-2
    if(flag==1 && sec-10>=clock_sec)
    begin
        flag = 0;
    end
    // 2-3
    if(set_mod==1)
    begin
        if(sec_1==59)
        begin
            sec_1 = 0;
            begin
                if(min_1==9) min_1 = 0;
                else min_1 = min_1 + 1;
            end
        end
        else    sec_1 = sec_1 + 1;
    end
    // 2-4
    else if(set_mod==0 && set_clock==0)
    begin
        sec_1 = sec_2;
        min_1 = min_2;
    end
    // 2-5
    if(min==clock_min && sec==clock_sec)
    begin
        flag = 1;
    end
end

//the third module
reg[5:0] clock_sec;
reg[5:0] clock_min;

always@(posedge add_time)
begin
    // 3-1
    if(set_mod==0 && set_clock==0)
    begin
        // 3-1-1
        if(set_option==1)
        begin
            if(clear==0)
            begin
                if(sec_2==59) sec_2 = 0;
                else sec_2 = sec_2 + 1;
            end
            else sec_2 = 0;
        end
        // 3-1-2
        else
        begin
            if(clear==0)
            begin
                if(min_2==59) min_2 = 0;
                else min_2 = min_2 + 1;
            end
            else min_2 = 0;
        end
    end
    // 3-2
    if(set_mod==0 && set_clock==1)
    begin
        // 3-2-1
        if(set_option==1)
        begin
            if(clear==0)
            begin
                if(clock_sec==59) clock_sec = 0;
                else clock_sec = clock_sec + 1;
            end
            else clock_sec = 0;
        end
        // 3-2-2
        else
        begin
            if(clear==0)
            begin
                if(clock_min==59) clock_min = 0;
                else clock_min = clock_min + 1;
            end
            else clock_min = 0;
        end
    end
end

 //the fourth module
 always@(sec_1 or min_1 or sec_2 or min_2)
 begin
    // 4-1
    if(set_mod==1)
    begin
        sec = sec_1;
        min = min_1;
    end
    // 4-2
    if(set_mod==0 && set_clock==0)
    begin
        sec = sec_2;
        min = min_2;
    end
end

//the fifth module
always@(min or sec or clock_min or clock_sec)
begin
    // 5-1
    if(set_clock==0)
    begin
        // 5-1-1
        case(min)
            6'd0:out1=14'b0000001_0000001;
            6'd1:out1=14'b0000001_1001111;
            6'd2:out1=14'b0000001_0010010;
            6'd3:out1=14'b0000001_0000110;
            6'd4:out1=14'b0000001_1001100;
            6'd5:out1=14'b0000001_0100100;
            6'd6:out1=14'b0000001_0100000;
            6'd7:out1=14'b0000001_0001111;
            6'd8:out1=14'b0000001_0000000;
            6'd9:out1=14'b0000001_0000100;
            6'd10:out1=14'b1001111_0000001;
            6'd11:out1=14'b1001111_1001111;
            6'd12:out1=14'b1001111_0010010;
            6'd13:out1=14'b1001111_0000110;
            6'd14:out1=14'b1001111_1001100;
            6'd15:out1=14'b1001111_0100100;
            6'd16:out1=14'b1001111_0100000;
            6'd17:out1=14'b1001111_0001111;
            6'd18:out1=14'b1001111_0000000;
            6'd19:out1=14'b1001111_0000100;
            6'd20:out1=14'b0010010_0000001;
            6'd21:out1=14'b0010010_1001111;
            6'd22:out1=14'b0010010_0010010;
            6'd23:out1=14'b0010010_0000110;
            6'd24:out1=14'b0010010_1001100;
            6'd25:out1=14'b0010010_0100100;
            6'd26:out1=14'b0010010_0100000;
            6'd27:out1=14'b0010010_0001111;
            6'd28:out1=14'b0010010_0000000;
            6'd29:out1=14'b0010010_0000100;
            6'd30:out1=14'b0000110_0000001;
            6'd31:out1=14'b0000110_1001111;
            6'd32:out1=14'b0000110_0010010;
            6'd33:out1=14'b0000110_0000110;
            6'd34:out1=14'b0000110_1001100;
            6'd35:out1=14'b0000110_0100100;
            6'd36:out1=14'b0000110_0100000;
            6'd37:out1=14'b0000110_0001111;
            6'd38:out1=14'b0000110_0000000;
            6'd39:out1=14'b0000110_0000100;
            6'd40:out1=14'b1001100_0000001;
            6'd41:out1=14'b1001100_1001111;
            6'd42:out1=14'b1001100_0010010;
            6'd43:out1=14'b1001100_0000110;
            6'd44:out1=14'b1001100_1001100;
            6'd45:out1=14'b1001100_0100100;
            6'd46:out1=14'b1001100_0100000;
            6'd47:out1=14'b1001100_0001111;
            6'd48:out1=14'b1001100_0000000;
            6'd49:out1=14'b1001100_0000100;
            6'd50:out1=14'b0100100_0000001;
            6'd51:out1=14'b0100100_1001111;
            6'd52:out1=14'b0100100_0010010;
            6'd53:out1=14'b0100100_0000110;
            6'd54:out1=14'b0100100_1001100;
            6'd55:out1=14'b0100100_0100100;
            6'd56:out1=14'b0100100_0100000;
            6'd57:out1=14'b0100100_0001111;
            6'd58:out1=14'b0100100_0000000;
            6'd59:out1=14'b0100100_0000100;
            default:out1=14'b1111111_1111111;
        endcase
        // 5-1-2
        case(sec)
            6'd0:out2=14'b0000001_0000001;
            6'd1:out2=14'b0000001_1001111;
            6'd2:out2=14'b0000001_0010010;
            6'd3:out2=14'b0000001_0000110;
            6'd4:out2=14'b0000001_1001100;
            6'd5:out2=14'b0000001_0100100;
            6'd6:out2=14'b0000001_0100000;
            6'd7:out2=14'b0000001_0001111;
            6'd8:out2=14'b0000001_0000000;
            6'd9:out2=14'b0000001_0000100;
            6'd10:out2=14'b1001111_0000001;
            6'd11:out2=14'b1001111_1001111;
            6'd12:out2=14'b1001111_0010010;
            6'd13:out2=14'b1001111_0000110;
            6'd14:out2=14'b1001111_1001100;
            6'd15:out2=14'b1001111_0100100;
            6'd16:out2=14'b1001111_0100000;
            6'd17:out2=14'b1001111_0001111;
            6'd18:out2=14'b1001111_0000000;
            6'd19:out2=14'b1001111_0000100;
            6'd20:out2=14'b0010010_0000001;
            6'd21:out2=14'b0010010_1001111;
            6'd22:out2=14'b0010010_0010010;
            6'd23:out2=14'b0010010_0000110;
            6'd24:out2=14'b0010010_1001100;
            6'd25:out2=14'b0010010_0100100;
            6'd26:out2=14'b0010010_0100000;
            6'd27:out2=14'b0010010_0001111;
            6'd28:out2=14'b0010010_0000000;
            6'd29:out2=14'b0010010_0000100;
            6'd30:out2=14'b0000110_0000001;
            6'd31:out2=14'b0000110_1001111;
            6'd32:out2=14'b0000110_0010010;
            6'd33:out2=14'b0000110_0000110;
            6'd34:out2=14'b0000110_1001100;
            6'd35:out2=14'b0000110_0100100;
            6'd36:out2=14'b0000110_0100000;
            6'd37:out2=14'b0000110_0001111;
            6'd38:out2=14'b0000110_0000000;
            6'd39:out2=14'b0000110_0000100;
            6'd40:out2=14'b1001100_0000001;
            6'd41:out2=14'b1001100_1001111;
            6'd42:out2=14'b1001100_0010010;
            6'd43:out2=14'b1001100_0000110;
            6'd44:out2=14'b1001100_1001100;
            6'd45:out2=14'b1001100_0100100;
            6'd46:out2=14'b1001100_0100000;
            6'd47:out2=14'b1001100_0001111;
            6'd48:out2=14'b1001100_0000000;
            6'd49:out2=14'b1001100_0000100;
            6'd50:out2=14'b0100100_0000001;
            6'd51:out2=14'b0100100_1001111;
            6'd52:out2=14'b0100100_0010010;
            6'd53:out2=14'b0100100_0000110;
            6'd54:out2=14'b0100100_1001100;
            6'd55:out2=14'b0100100_0100100;
            6'd56:out2=14'b0100100_0100000;
            6'd57:out2=14'b0100100_0001111;
            6'd58:out2=14'b0100100_0000000;
            6'd59:out2=14'b0100100_0000100;
            default:out2=14'b1111111_1111111;
        endcase
    end
    // 5-2
    else
    begin
        // 5-2-1
        case(clock_min)
            6'd0:out1=14'b0000001_0000001;
            6'd1:out1=14'b0000001_1001111;
            6'd2:out1=14'b0000001_0010010;
            6'd3:out1=14'b0000001_0000110;
            6'd4:out1=14'b0000001_1001100;
            6'd5:out1=14'b0000001_0100100;
            6'd6:out1=14'b0000001_0100000;
            6'd7:out1=14'b0000001_0001111;
            6'd8:out1=14'b0000001_0000000;
            6'd9:out1=14'b0000001_0000100;
            6'd10:out1=14'b1001111_0000001;
            6'd11:out1=14'b1001111_1001111;
            6'd12:out1=14'b1001111_0010010;
            6'd13:out1=14'b1001111_0000110;
            6'd14:out1=14'b1001111_1001100;
            6'd15:out1=14'b1001111_0100100;
            6'd16:out1=14'b1001111_0100000;
            6'd17:out1=14'b1001111_0001111;
            6'd18:out1=14'b1001111_0000000;
            6'd19:out1=14'b1001111_0000100;
            6'd20:out1=14'b0010010_0000001;
            6'd21:out1=14'b0010010_1001111;
            6'd22:out1=14'b0010010_0010010;
            6'd23:out1=14'b0010010_0000110;
            6'd24:out1=14'b0010010_1001100;
            6'd25:out1=14'b0010010_0100100;
            6'd26:out1=14'b0010010_0100000;
            6'd27:out1=14'b0010010_0001111;
            6'd28:out1=14'b0010010_0000000;
            6'd29:out1=14'b0010010_0000100;
            6'd30:out1=14'b0000110_0000001;
            6'd31:out1=14'b0000110_1001111;
            6'd32:out1=14'b0000110_0010010;
            6'd33:out1=14'b0000110_0000110;
            6'd34:out1=14'b0000110_1001100;
            6'd35:out1=14'b0000110_0100100;
            6'd36:out1=14'b0000110_0100000;
            6'd37:out1=14'b0000110_0001111;
            6'd38:out1=14'b0000110_0000000;
            6'd39:out1=14'b0000110_0000100;
            6'd40:out1=14'b1001100_1111110;
            6'd41:out1=14'b1001100_1001111;
            6'd42:out1=14'b1001100_0010010;
            6'd43:out1=14'b1001100_0000110;
            6'd44:out1=14'b1001100_1001100;
            6'd45:out1=14'b1001100_0100100;
            6'd46:out1=14'b1001100_0100000;
            6'd47:out1=14'b1001100_0001111;
            6'd48:out1=14'b1001100_0000000;
            6'd49:out1=14'b1001100_0000100;
            6'd50:out1=14'b0100100_1111110;
            6'd51:out1=14'b0100100_1001111;
            6'd52:out1=14'b0100100_0010010;
            6'd53:out1=14'b0100100_0000110;
            6'd54:out1=14'b0100100_1001100;
            6'd55:out1=14'b0100100_0100100;
            6'd56:out1=14'b0100100_0100000;
            6'd57:out1=14'b0100100_0001111;
            6'd58:out1=14'b0100100_0000000;
            6'd59:out1=14'b0100100_0000100;
            default:out1=14'b1000100_1000100;
        endcase
        // 5-2-2
        case(clock_sec)
            6'd0:out2=14'b0000001_0000001;
            6'd1:out2=14'b0000001_1001111;
            6'd2:out2=14'b0000001_0010010;
            6'd3:out2=14'b0000001_0000110;
            6'd4:out2=14'b0000001_1001100;
            6'd5:out2=14'b0000001_0100100;
            6'd6:out2=14'b0000001_0100000;
            6'd7:out2=14'b0000001_0001111;
            6'd8:out2=14'b0000001_0000000;
            6'd9:out2=14'b0000001_0000100;
            6'd10:out2=14'b1001111_0000001;
            6'd11:out2=14'b1001111_1001111;
            6'd12:out2=14'b1001111_0010010;
            6'd13:out2=14'b1001111_0000110;
            6'd14:out2=14'b1001111_1001100;
            6'd15:out2=14'b1001111_0100100;
            6'd16:out2=14'b1001111_0100000;
            6'd17:out2=14'b1001111_0001111;
            6'd18:out2=14'b1001111_0000000;
            6'd19:out2=14'b1001111_0000100;
            6'd20:out2=14'b0010010_0000001;
            6'd21:out2=14'b0010010_1001111;
            6'd22:out2=14'b0010010_0010010;
            6'd23:out2=14'b0010010_0000110;
            6'd24:out2=14'b0010010_1001100;
            6'd25:out2=14'b0010010_0100100;
            6'd26:out2=14'b0010010_0100000;
            6'd27:out2=14'b0010010_0001111;
            6'd28:out2=14'b0010010_0000000;
            6'd29:out2=14'b0010010_0000100;
            6'd30:out2=14'b0000110_0000001;
            6'd31:out2=14'b0000110_1001111;
            6'd32:out2=14'b0000110_0010010;
            6'd33:out2=14'b0000110_0000110;
            6'd34:out2=14'b0000110_1001100;
            6'd35:out2=14'b0000110_0100100;
            6'd36:out2=14'b0000110_0100000;
            6'd37:out2=14'b0000110_0001111;
            6'd38:out2=14'b0000110_0000000;
            6'd39:out2=14'b0000110_0000100;
            6'd40:out2=14'b1001100_0000001;
            6'd41:out2=14'b1001100_1001111;
            6'd42:out2=14'b1001100_0010010;
            6'd43:out2=14'b1001100_0000110;
            6'd44:out2=14'b1001100_1001100;
            6'd45:out2=14'b1001100_0100100;
            6'd46:out2=14'b1001100_0100000;
            6'd47:out2=14'b1001100_0001111;
            6'd48:out2=14'b1001100_0000000;
            6'd49:out2=14'b1001100_0000100;
            6'd50:out2=14'b0100100_0000001;
            6'd51:out2=14'b0100100_1001111;
            6'd52:out2=14'b0100100_0010010;
            6'd53:out2=14'b0100100_0000110;
            6'd54:out2=14'b0100100_1001100;
            6'd55:out2=14'b0100100_0100100;
            6'd56:out2=14'b0100100_0100000;
            6'd57:out2=14'b0100100_0001111;
            6'd58:out2=14'b0100100_0000000;
            6'd59:out2=14'b0100100_0000100;
            default:out2=14'b1000100_1000100;
        endcase
    end
end

//the sixth module
parameter s0=4'd0,s1=4'd1,s2=4'd2,s3=4'd3,s4=4'd4,
             s5=4'd5,s6=4'd6,s7=4'd7,s8=4'd8,s9=4'd9;

always@(CS)
begin
    case(CS)
        4'd0:led=8'b00000000;    
        4'd1:led=8'b11111111;
        4'd2:led=8'b11111111;
        4'd3:led=8'b11100111;
        4'd4:led=8'b11000011;
        4'd5:led=8'b10000001;
        4'd6:led=8'b11000011;
        4'd7:led=8'b11100111;
        4'd8:led=8'b11111111;
        4'd9:led=8'b00000000;
        default:led=8'b00000000;
    endcase
end

endmodule
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算法 芯片
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C语言 Perl
西门子S7-1200编程实例,电动机起保停控制梯形图如何编写?
本篇我们通过一个电动机起保停控制的实例,介绍S7-1200的使用方法,按下瞬时启动按钮I0.6,电动机Q0.0启动,按下瞬时停止按钮I0.7,电动机Q0.0停止。
西门子S7-1200编程实例,电动机起保停控制梯形图如何编写?
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存储 算法 编译器
快速入门数字芯片设计,UCSD ECE111(四)深入理解状态机(上)
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快速入门数字芯片设计,UCSD ECE111(四)深入理解状态机(上)
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算法 C语言 芯片
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计数器的设计--电子技术课程设计说明书--模99
计数器的设计--电子技术课程设计说明书--模99