继续翻译
4.14 Generating Prerequisites Automatically =========================================== In the makefile for a program, many of the rules you need to write often say only that some object file depends on some header file. For example, if `main.c' uses `defs.h' via an `#include', you would write: main.o: defs.h You need this rule so that `make' knows that it must remake `main.o' whenever `defs.h' changes. You can see that for a large program you would have to write dozens of such rules in your makefile. And, you must always be very careful to update the makefile every time you add or remove an `#include'. To avoid this hassle, most modern C compilers can write these rules for you, by looking at the `#include' lines in the source files. Usually this is done with the `-M' option to the compiler. For example, the command: cc -M main.c generates the output: main.o : main.c defs.h Thus you no longer have to write all those rules yourself. The compiler will do it for you.
4.14 自动生成前提条件
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在为程序而作的 makefile 中，很多你需要写的规则经常说 有些文件依赖于某些头文件。
例如，如果你的 main.c 通过 #include 使用了 defs.h， 你可能会写：
main.o: defs.h
你需要这个规则，于是 make 知道它必须重新构建 main.o ，只要defs.h 文件变化了就是如此。你会看到对一个大型程序而言你不得不写很多这样的规则。并且，每次增加或减少 #include ，你必须总是十分小心地修改 makefile。
为了避免这个烦恼，很多现代的C 编译器可以通过查找源文件中的 #include 行来为你写这些规则。通常这是通过 编译器的 -M选项来实现的。例如，如下指令：
cc -M main.c
导致如下的输出:
main.o : main.c defs.h
这样你不用再自己必须写所有的规则了。编译器将要为你作这件事情。
后文待续
本文转自健哥的数据花园博客园博客，原文链接：http://www.cnblogs.com/gaojian/archive/2012/09/26/2704115.html，如需转载请自行联系原作者
