LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT2T IS PORT(CO3:IN STD_LOGIC; Q:OUT STD_LOGIC); END CNT2T; ARCHITECTURE bhv OF CNT2T IS SIGNAL Q1:STD_LOGIC_VECTOR(0 TO 1); BEGIN PROCESS(CO3) BEGIN IF CO3’EVENT AND CO3=‘1’ THEN IF Q1<1 THEN Q1<=Q1+1; ELSE Q1<=“00”; END IF; END IF; IF Q1=1 THEN Q<=‘1’; ELSE Q<=‘0’; END IF; END PROCESS; END bhv;