Hierarchical_State_Machine Class Reference

Collaboration diagram for Hierarchical_State_Machine:

Detailed Description

For details refer to the article on Hierarchical State Machines

In conventional state machine design, all states are considered at the same level. The design does not capture the commonality that exists among states. In real life, many states handle most messages in similar fashion and differ only in handling of few key messages. Even when the actual handling differs, there is still some commonality. Hierarchical state machine design captures the commonality by organizing the states as a hierarchy. The states at the higher level in hierarchy perform the common message handling, while the lower level states inherit the commonality from higher level ones and perform the state specific functions. This examples explores hierarchichal state machines using an example of a hardware unit that can be in the following states:

• Inservice state
  • Active state
  • Standby state
• Out_Of_Service
  • Suspect state
  • Failed state

Definition at line 32 of file Hierarchical_State_Machine.h.

Member Function Documentation

00170 {
00171     p_Current_State = &r_State;
00172 }

00018 {
00019     switch (p_Message->GetType())
00020     {
00021     case Message::FAULT_TRIGGER:
00022         p_Current_State->On_Fault_Trigger(*this, p_Message);
00023         break;
00024 
00025     case Message::SWITCHOVER:
00026         p_Current_State->On_Switchover(*this, p_Message);
00027         break;
00028 
00029     case Message::DIAGNOSTICS_PASSED:
00030         p_Current_State->On_Diagnostics_Passed(*this, p_Message);
00031         break;
00032 
00033     case Message::DIAGNOSTICS_FAILED:
00034         p_Current_State->On_Diagnostics_Failed(*this, p_Message);
00035         break;
00036 
00037     case Message::OPERATOR_INSERVICE:
00038         p_Current_State->On_Operator_Inservice(*this, p_Message);
00039         break;
00040 
00041     default:
00042         assert(false);
00043         break;
00044     }
00045 }