F_CODE解码器VHDL程序

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY F_CODE IS
   PORT(INX: IN STD_LOGIC_VECTOR (0 TO 3);
        CODE: OUT STD_LOGIC_VECTOR(0 TO 3);
        H:OUT STD_LOGIC;
        TO1:OUT STD_LOGIC_VECTOR(0 TO 10));
END;
ARCHITECTURE one OF F_CODE IS
BEGIN
  Search : PROCESS(INX) BEGIN
  CASE INX IS
     WHEN"0000"=>TO1<="11111111111";CODE<="0000";H<='0';
     WHEN"0001"=>TO1<="01100000101";CODE<="0001";H<='0';
     WHEN"0010"=>TO1<="01110010000";CODE<="0010";H<='0';
     WHEN"0011"=>TO1<="10000001100";CODE<="0011";H<='0';
     WHEN"0101"=>TO1<="10010101101";CODE<="0101";H<='0';
     WHEN"0110"=>TO1<="10100001010";CODE<="0110";H<='0';
     WHEN"0111"=>TO1<="10101011100";CODE<="0111";H<='0';
     WHEN"1000"=>TO1<="10110000010";CODE<="0001";H<='0';
     WHEN"1001"=>TO1<="10111001000";CODE<="0010";H<='0';
     WHEN"1010"=>TO1<="11000000110";CODE<="0011";H<='0';
     WHEN"1100"=>TO1<="11001010110";CODE<="0101";H<='0';
     WHEN"1101"=>TO1<="11010000100";CODE<="0110";H<='0';
     WHEN"1111"=>TO1<="11011000000";CODE<="0001";H<='0';
     WHEN OTHERS =>TO1<="11111111111";CODE<="0000";H<='0';
  END CASE;
 END PROCESS;
END one ;